Timeline for T-Engine Activities
Written by: Mohit Sindhwani
At the TRON Show in December 2006, one of the big posters showed a timeline of activities related to the T-Engine. It showed the plans that the T-Engine Forum has for the technical developments of the T-Engine. Since then, I have been trying to find a copy of that picture online and have been referring to the digital photo that I had taken at the show to make my plans. However, I’ve finally found the picture and here it is.
Original image: http://www.tron.org/topics/2007/2007-02-03.html
The picture adds more weight and dates to my article about the future directions with the T-Kernel. It can be seen that there is a clear push towards ending up with complete scalability that ranges from 8-bit architectures all the way up to multi-processing systems. Obviously, it is expected that the μT-Kernel will form the default RTOS for 8-bit and 16-bit architectures (read more about the μT-Kernel). At the same time, 32-bit processors will have the choice of running on the μT-Kernel, the T-Kernel, or with the T-Kernel Standard Extension. Of course, multicore and multi-processing will be under the TK/MP. In the future, there is also a plan for the TK/SE to evolve into an extension that supports multi-processing.
The other pipelines shown in the chart are also interesting. On top, there’s a plan to release the basic TCP/IP stack to be followed by a “Secure Network” to follow next year (I could not find much else about the Secure Network, but it may have something to do with eTRON – there may be something more about it at the .
At the bottom, there is a plan to further improve the toolchain/ IDE for the T-Engine. Already, there is an Eclipse plugin that is available for the T-Engine, but this is expected to become more feature-rich in the coming months.
I wonder if there will be changes to this timeline at the TRON Show this year, but this definitely sheds a clear light on the path the T-Engine Forum plans to take.